Aug.25 Timer Counter

Next Step: See exactly what code examples use
and understand what eCos wants to do for an application.

Following are notes / summary of my understanding of ARM7 Timer Counters from:

• Atmel AT91 datasheet (includes AT91SAM7S256 = ARM7 in LMS) 
• Interrupt Genration Using the AT 91 Timer/Counter Application Note (with asm examples)

Color code: HighLevel; Register; Bit

TCs can be pgmd to:

1. freq measurement
2. **event counting (like lms motor tacho count)
3. interval measurement
4. pulse generation
5. delay timing
6. pulse width modulation 
7. interrupt generation

Each channel has:

• 3 external clk inputs=
• 5 internal clk inputs= TIMER_CLOCK1-5; MCK/2 8 31 1128 1024
• 2 multi-purpose i/o signals=
• 1 internal interrupt signal = 33-2 Channel signal
• (can be pgmd to generate processor interrupts

with

2 Operating Modes= DS p.444 / p.2 ApplNote 

• Capture Mode  (measurement on signals) 
• TIOA always output
• TIOB 
• usually output
• can be selected as external trigger
• Waveform Mode (wave generation)    
• WAVE bit (=?) in TCx_CMR 

Triggers

3 common to both modes:

• Software
• set SWTRG bit in TCx_CCR
• SYNC signal asserted. 
• Asserted same time for all 3 channels 
• "by writing TC_BCR (block cntl) with SYNC set(?)"
• Compare RC Trigger
• triggers "when counter value matches the RC value if CPCTRG is set in TCx_CMR" 
•  (Does this relate to lms Schmitt trigger?)

1 external trigger (per channel)

• in Capture Mode:
• selected via TIOA and TIOB
• in Waveform Mode:
• Signals that can be programmed on
•  TIOB
•  XC0, XC1, XC2
• External event triggered by setting ENETRG in TCxCMR
• *Duration of pulses must be longer than the system clock (MCK) to be detected.

Clock Source

Timer Interrupt Generation