Bad JTAG to Lego cable replaced so can test on Lego HW !!
Working on using PORT as input:
Test works, but gets error message.
Reason: INT was commented out in code to save space
256Mb Flash is small so need to keep FORTE small so room for applications
see eclipseWork\forte_lms_neu\src\Makefile.am
ex:
forte_SOURCES += core/datatypes/forte_uint.cpp
#forte_SOURCES += core/datatypes/forte_usint.cpp
Reason: INT was commented out in code to save space
256Mb Flash is small so need to keep FORTE small so room for applications
see eclipseWork\forte_lms_neu\src\Makefile.am
ex:
forte_SOURCES += core/datatypes/forte_uint.cpp
#forte_SOURCES += core/datatypes/forte_usint.cpp
Debugging (stepwise) simple line1b algorithm via simulation
- learned new tricks about testing with FBDK FBs for UI.
- composite FB includes
- Java imports entered via click on compiler (import fb.rt.hmi.*;)
- when save the package name is added to this information
- 4DIAC xmls and FBDK java/class files
- open 4DIAC xmls in the workspace/system/typelibrary group
- saved under FBDK src/package_name directory
- FBDK FBs for UI.
- FBs can be tested under FBDK without an application!
- if INIT event path comes back to the REQ of an FBDK FB and the event is sent to the REQ, but no CNF sent, then add an E_DELAY with small time between the send and the REQ input. (=FBDK error workaround)
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